An example of stacked solid-state image sensor is disclosed in PTL1 of the Patent Literature. In this stacked solid-state image sensor, a photoelectric conversion film is formed on a control electrode, and a transparent electrode layer is formed on the photoelectric conversion film. In the stacked solid-state imaging apparatus, a voltage applied to the transparent electrode acts on the control electrode via the photoelectric conversion film to convert optical information to an electric signal with a favorable SNR (signal-to-noise ratio).
The stacked solid-state image sensor has such a structure that includes a semiconductor substrate on which a pixel circuit is formed, and a photoelectric conversion film formed on the semiconductor substrate through an insulating film. Accordingly, it is possible to form the photoelectric conversion film by using a material that has a large optical absorption coefficient such, for example, as amorphous silicon.
However, the stacked solid-state image sensor disclosed in PTL1 generates a noise when a signal charge is reset. Specifically, the stacked solid-state image sensor disclosed in PTL1 has such a problem that a random noise (reset noise) is generated at a trailing edge of a reset pulse contained in a reset signal due to capacitive coupling between a reset signal line and a pixel electrode and the like. Since the stacked solid-state image sensor is unable to perform complete charge transfer, it cannot completely cancel the reset noise (the kTC noise) even if it performs sampling by a correlated double sampling circuit (hereafter referred to as a CDS circuit) in the manner as used in the general pinned photodiode type solid-state imaging apparatus. Since a next signal charge is added to the charge after each reset operation in the state that the generated noise remains, a signal charge on which the reset noise is superposed will be read out. For this reason, the stacked solid-state image sensor disclosed in PTL1 has such a problem that the random noise becomes large.
To reduce the kTC noise, a technique as disclosed in PTL2 of the Patent Literature has been proposed. A pixel part of adjacent four pixels and its peripheral circuit disclosed in PTL2 are shown in FIG. 14. Each of the regions surrounded by dotted lines 31a to 31d indicates a pixel. Elements 37a to 37d are reset transistors, and elements 43a to 43d are select transistors. Terminals 40a and 40b are terminals for respectively applying voltages to gates of the select transistors. Terminals 45a and 45b are terminals for applying voltages to gates of the reset transistors. An operation of discharging the charge stored in the storage region is performed by completely turning ON the reset transistor in each of the pixels in a selected row and then turning OFF the reset transistor. A readout signal from a readout transistor is input through a vertical signal line to negative feedback amplifier 33a or 33b disposed in each column, and an output signal from the negative feedback amplifier is fed back to the source of the reset transistor. The purpose of this structure is to cancel the noise by feeding back the noise signal in a negative feedback manner to the charge storage region, or the noise source, when the reset transistor is in a completely turned ON state.